Multi Core Computing in the Modern Process

DATE: Thursday, October 28, 2010
PLACE : University of Cincinnati, Engineering Research Center  Room 427
(see below for directions)
TIME : 5:30 p.m. to 6:00 p.m. –  Social Time
6:00 p.m. to 7:00 p.m. –  Pizza and Beverages
7:00 p.m.- 8:30 p.m.  Tour and presentation
COST:   Dinner is being provided by the IEEE Cincinnati
Parking is $7 if you use a UC garage.

NOTE:  DINNERS ARE ALWAYS OPTIONAL – YOU MAY ATTEND THE PROGRAM ONLY.

MENU SELECTIONS:   Pizza and Beverages (free)

LOCATION:  Parking is available in the Woodside and Campus Green Garages- enter Woodside Gateway (Woodside Drive) from Martin Luther King Drive.  After parking, walk south on Woodside Drive- the library is on the right.  The ERC (Engineering Research Center) is the next building on the right.
http://www.uc.edu/content/dam/common/docs/maps/campus_map_west.pdf

Here is a Google Map to the Campus Green Garage. You can use it to get directions from your home. The Engineering Research Center is just down Woodside Place from the garage. Meeting is in ERC room 427.
View Larger Map

RESERVATIONS:  Please email Fred Nadeau for reservations at mailto:fnadeau1@earthlink.net (preferred) or call the Section Voice Mail at 513-629-9380 begin_of_the_skype_highlighting              513-629-9380      end_of_the_skype_highlighting by Noon, Tuesday, October 26, 2010 if you plan to attend. Please leave your Name, IEEE Member Number, and a daytime telephone number.

PE CREDITS: Depending on the subject matter, attendance at IEEE Cincinnati Section Meetings now qualifies the attendee for Professional Development Hours towards renewal of Professional Engineers Licenses. Required documentation will be available following the meeting!  The Section Meetings also provide a great opportunity to network with fellow engineers in the area.

ABOUT THE MEETING:  Struggling to increase the processor clock rate, computer manufacturers have turned to adding parallel processing to modern processors.  Primarily this parallelism takes the form of hyperthreading or multiple core processor designs (and sometimes both).  Multi-core and hyperthreading (also called simultaneous multi-threading, SMT) are become widely available in desktop and laptop computing as well as within processors designed for embedded computing.  In this talk, we will examine what these terms really mean and how they are implemented.  Implications for improving (or not) your processor’s throughput and power are reviewed and examined.  We will also briefly touch on the programming approaches to utilize multi-core/hyperthreaded processors to introduce parallelism into your running programs.

About the Presenter:  Dr. Philip Wilsey, Professor of Electrical and Computer Engineering at University of Cincinnati’s College of Engineering and Applied Science.
A self-described experimentalist working in distributed systems. For the past 5 years, he has been studying the application of feedback control to optimize distributed system operation. The focus of his investigations has been Parallel and Distributed Simulation (PADS) with applications to: Mixed-Technology (continuous/discrete) Systems, VLSI, and Digital Systems. His principle objective is the introduction of online control systems into distributed systems by: (i) development of pragmatic methodologies; (ii) development of prototype tool sets; and (iii) introduction into the graduate and undergraduate curricula. In addition, he has been actively involved in: parallel and distributed computing, VHDL-CAD, the computer system design process, and formal modeling, and mechanized reasoning. Dr. Wilsey is the academic advisor to the U.C. Student Branch of IEEE.